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Showing posts with label 3-2. Show all posts
Showing posts with label 3-2. Show all posts
Friday, 10 April 2015
DSP Bits
Wednesday, 27 March 2013
III Year DSP BITS
Digital Signal Processing (DSP)
JNTUH Second
mid Bits
UNIT-5
SECTION-I: Multiple choice questions
1. The
impulse invariant mapping and bilinear mapping are [ d ]
( a ) both are
many-to-one mapping ( b ) both are one-to-one mapping
( c ) one- to-
one and many-to-one mapping respectively
(
d ) many-to-one and one- to-one mapping
2. In Chebyshev approximation, at the cutoff
frequency,the normalized magnitude response has a value of [ a]
3. The
two properties which are preserved in analog to digital transformation are [ c ]
( a ) linearity
and stability ( b ) linearity and causality
( c ) stability
and causality ( d ) time in variant and linearity
4. A mapping from the S-Plane to the Z-Plane
called [ c]
(a) Laplace
Transform (b) Z-Transform (c) Bilinear Transform (d) None
5. In which filters exhibit equiripple behavior
in the pass band and a monotonic characteristics in the stop band [ b ]
(a) Butterworth
(b) Type I Chebyshev (c) Type 2 Chebyshev (d) Elliptic
6. How many types of chebyshev filters are there?
[
b ]
(a) 4 (b) 2 (c) 3
(d) 6
7. The digital frequency in bilinear
transformation is [ b ]
8. In chebyshev filter, the alternation constant
is [a ]
9. The ratio
(Ω2)/(Ω1) for impulse invariant transformation is (a)
(a)
(W1)
/ (w2) (b) (w1)/(w) (c) (w)/(w2) (d) (w1)/(w2)
10. The normalized magnitude response of chebyshev type-I filter has a value of ________ at the
cutoff frequency Ω (c )
Section-II: Fill in the blanks
1.In impulse
invariant mapping the left half poles of s-plane are mapped into
Interior of unit circle in z-plane
2. The poles of
the butterworth transfer function symmetrically lies on an unit circle in
s-lane with
angular spacing
of π/N
3. The frequency response of the
Butterworth filter Decreases monotonically with Increasing Ω
and as the filter order increases, the transition band become narrower.
4. Impulse
invariance method is not suitable for HIGH PASS
5. Bilinear Transformation can pressure the magnitude response of
an analog filter, but the phase response of the analog filter cannot be
pressured
6. A linear phase
analog filter cannot be transformed to a linear phase digital filter using bilinear
transformation.
Prepared by
B.SRIDHAR
Monday, 11 February 2013
III year Digital communications bits
Digital communications
Unit-1
1.The advantage of Manchester encoding is [ c ]
A) less band width requirement B) less bit energy required for
transmission
C)
less probability of error D) less bit duration
2. The Nyquist's
rate of sampling of an analog signal S(t) for alias free reconstruction is
5000samples/sec. For a signal x(t) = [S(t)]2 ,the corresponding sampling rate
in samples/sec is 10,000
3. The sampling
rate in Delta Modulation is More than
PCM.
Uniit-2
1. The minimum band width required to multiplex
12 different message signals each of band width 10KHz is [ b]
A) 60KHz B)
120KHz C) 180KHz D) 160KHz
2. Companding results in [ c]
A)More S/N ratio at higher amplitudes of the base band signal
B) More S/N ratio at lower amplitudes of the base band signal
C) Uniform S/N ratio throughout the base band signal
D) Better S/N
ratio at lower frequencies
3. A uniform quantizer is having a step size of
.05 volts. This quantizer suffers from a maximum quantization error of [ b ]
A) 0.1V B)
0.025 V C) 0.8 V D) 0.05 V
4. Granular Noise in Delta Modulation system can
be reduced by [ c ]
A) using a square law device B) increasing the step size
C) decreasing
the step size D) adjusting the rate of rise of the base band signal
5. Tapped
Delay Line Filter is used as a
Predictor in a DPCM transmitter.
6. A
signal extending over -4v to +4v is quantized into 8 levels. The maximum
possible quantization error obtainable is 0.5v
V.
7. The
sampling rate in Delta Modulation is more
than PCM.
Unit-3
1.In 8-PSK system, adjacent phasors differ by
an angle given by ( in degrees) [ a ]
A) n/4 B) n/8 C) n/6 D) n/2
2. Band Width
efficiency of a Digital Modulation Method is [ c ]
A)
(Minimum Band width)/ (Transmission Bit Rate)
B)
(Power required)/( Minimum Band width)
C) (Transmission Bit
rate)/ (Minimum Band width)
D) (Power Saved during transmission)/(Minimum Band
width)
3. The minimum
band width required for a BPSK signal is equal to [d ]
A) one fourth of bit rate B) twice the bit rate C)
half of the bit rate D) bit rate
4. In Non-Coherent demodulation, the receiver [ b
]
A) relies on carrier
phase B) relies on the carrier amplitude
C) makes an error with less probability D) uses a
carrier recovery circuit
5. Non-coherent detection of FSK signal results in More Probability of error
6. The phases in a QPSK system can be expressed as 0,
90, 180,270
7. The Synchronization is defined as The use of same clock to maintain the
order of transmission
Unit-4
1. The
Auto-correlation function of White Noise is [ a]
A) Impulse function B) Constant C) Sampling
function D) Step function
2. A Matched filter is used to minimizes the probability of error
3. The bit error Probability of BPSK
system is same that of QPSK.
Prepared by
Jyosthna
Prepared by
Jyosthna
III Year MP and MC Bits
Micro
processors and micro controllers
JNTUH mid bits
UNIT-1
1.Which of the following
register is not present in EU( Execution Unit) of the 8086 microprocessor? [ d]
a.
SP b.BP c.SI d.IP
2. Which signal is used to demultiplex the
Adress bus of 8086 [ d ]
a.
BHE b.LOCK c.READY d.ALE
3. Which of the following signal is used to
control the direction of dataflow of bus transcievers [ a ]
_ __ ____
a. DT / R b. M / IO
c. DEN d.ALE
4. Which of the following signal belongs to
maximum mode only [ c ]
____ _____ _____ ____
a. RD b. TEST c. LOCK d.
DEN
5. Which of the following pair of registers is
invalid [ a ]
a.
CS:SP b. SS: SP c. DS:BX d. ES:DI
6. Which of the following flags is used for
single stepping [ c]
a.
Direction Flag b. Interrupt Flag c.Trap Flag d. Overflow Flag
7. Which of the following are the three basic
sections of a microprocessor unit? [ b]
(A) operand,
register, and arithmetic/logic unit (ALU)
(B) control and
timing, register, and arithmetic/logic unit (ALU)
(C) control and
timing, register, and memory
(D)
arithmetic/logic unit (ALU), memory, and input/output
8. Which bus is a bidirectional bus? [ b ]
(A)
address bus (B) data bus (C) address bus and data bus (D) none of the above
9. Direction flag is used with [ a]
(A) String
instructions (B) Stack instructions
(C)
Arithmetic instructions (D) Branch instructions
10. What does microprocessor speed depends on? [ c ]
(A)
Clock (B) Data bus width (C) Address bus width (D)size of register
11. A register capable of shifting its binary
information either to the right or the left is called a[ c] (A)parallel
register (B) serial register (C) shift register (D) storage register
12. What is meant by Maskable interrupts? [ b ]
(A) An interrupt
which can never be turned off
(B) An interrupt
that can be turned off by the programmer
(C) An interrupt
which can be turned off automatically
(D) none
13. In a DMA write operation the data is
transferred [ a]
(A) from I/O to
memory (B) from memory to I/O
(C) from memory
to memory (D) from I/O to I/O
Fill in the blanks
1.
Flags
are divided into control flags
& conditional flags
2.
Data
bus is used for sending and receiving data between CPU and
other devices
3.
The function of instruction CLC is to reset the carry flag to zero
3.
ALE( address latch enable) signal is provided by 8086 to
demultiplex the AD0-AD15 into A0-A15 & D0-D15 using
external latches.
4.
The
part of operating system which is loaded in RAM during powerup from harddisk or
floppy disk is known as DOS(disk operating system)
6.The
cycle required to read from memory is called Machine Cycle.
7.The
address available at 8086 pins is called Physical Address
8. The Condition which makes CPU execute next instruction
after WAIT instruction is
TEST Becomes Low
UNIT-2
1. Which of
the following register holds the address of I/O port of I/O instructions of
8086 [ b ]
a.
BX b.DX c.SI d.DI
2. What do
the symbols [ ] indicate? [ c]
(A) Direct addressing (B) Register Addressing
(C) Indirect addressing (D) None of the above
Fill in the blanks
3. The instruction MOV AX,BX gives that the contents of register BX are copied to AX
and stored in it
4. The instruction MOV 1234[BX],3456H is Six (6) bit (opcode) Instruction.
UNIT-3
1. The advantage of memory mapped I/O
over I/O mapped I/O is, [ d ]
(A) Faster (B) Many instructions supporting memory
mapped I/O
(C) Require a bigger address decoder (D) All the
above
2. Which pins
are general purpose I/O pins during mode-2 operation of the 8255? [ a ]
(A) PA0 – PA7 (B) PB0-PB7 (C) PC3-PC7 (D) PC0-PC2
3. An example for a D/A converter is IC
1408,DAC0830/DAC0831/DAC0832
4._Port A
port of 8255 can be programmed in three modes: mode 0, mode 1, mode 2.
5.The modes used in display mode are left
entry mode (type wroter mode) & right entry mode (calculator type mode)
UNIT-4
1.If a memory block uses address range 10000H to 2FFFFh then
its capacity is [ b ]
a. 64KB b.128KB c.256KB d.512KB
2. Which Command word of 8259 is used masking
interrupts [ c ]
a. ICW1 b.ICW2
c.OCW1 d.OCW2
3. During block transfer mode , the completion of data
transfer is indicated by . TC Flag
4.The Seventh
(7) bit of the Control word register of 8257 is used for enabling auto
load facility.
5.The Instruction of 8257 used
to disable CPU address is AEN.
6.The number of 8259s required
to service 64 interrupts is Nine (9)
7.. The command word used to
differentiate master and slave is ICW3.
Prepared by
Chayadevi
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