Monday, 8 July 2013
PLACEMENTS
Hai All.
In this section i will provide information related to placements......
Regards
Praveen.k
In this section i will provide information related to placements......
Regards
Praveen.k
Thursday, 25 April 2013
R&D SUMMER TRAINING PROGRAM
Hai All,
Please find the circular related to Summer Training program by R&D Department. For Further details Contact Kishore Sir...
CIRCULAR
All the 2nd Year ECE Students are here by
informed that our R&D cell is conducting summer training programs (Hands-on
–practice cum certification) in the month of JUNE 2K13 commencing from 01-JUNE-2K13.
There is no registration fee. The training program details are as listed below.
1.
PSPICE
2.
EMBEDDED
SYSTEMS: MPLAB IDE, KEIL, ECLIPSE, AVR STUDIO by using Atmega, PIC
Microcontrollers (on AURUM BOARDS, RTOS BOARDS), and Demonstration of GPS,
Zigbee, GSM based Projects , Wireless
controlled(PC< DTMF Robos) etc….
3.
VHDL,VERILOG:
using MODELSIM, XILINX (on FPGA,HELIUM BOARDS)
4.
MATLAB: Image
Processing, Statistical detection , Signal processing
5.
PCB DESIGN:
Orcad for 2-layer PCB
A copy of program details is available in R&D
cell notice board. All the interested
candidates can enroll their names with the R&D cell.
D.Kishore Principal
R&D member.
Copy to
Academic Director
ECE-HOD
NOTICE BOARD
Tuesday, 23 April 2013
Few Transformers viva questions
Hi all,
Please find few viva questions from transformers.
Please find few viva questions from transformers.
1. Define Transformer(T/F)
2. What happens if DC supply is given to transformer?
3. a) On which principle T/F Works. b) What is isolation T/F and what is its
uses.
4. Why T/F is called constant flux device.
5.
Why T/F is called static piece of device.
6.
Why T/F is called constant power device.
7.
Why T/F is called constant frequency device.
8.
What is ideal and practical T/Fs?
9.
Define primary winding, secondary winding.
10.
Define LV (Low Voltage) Wdg, HV Wdg.
11.
What is the Relation between Emf/Turn in primary Wdg, Secondary
Wdg?
12.
Why primary Wdg, Secondary Wdg are interleaved (placed on same
leg).
13.
Why always LV Wdg is placed near by the core.
14.
What is demagnetizing turns in T/F.
15.
Define MMF
16.
What are different types if loads
17.
Define power factor.
18.
Define active power, reactive power
19.
How variation in load is connected to variation of power factor.
20.
What is the use of Iw, Im,
21.
What Ro, Xo represents.
22.
What is turns ratio?
Write the value if K for step up, step down isolation T/Fs.
23.
What is maximum efficiency condition in T/F.
24.
Where hysteresis loss, eddy current loss occurs in T/F, WHY they occur, how to minimize them..
25.
Why Iron losses are called constant loss.
26.
Why copper losses are called variable losses.
27.
Why transformer is rated in KVA instead of KW.
28.
A) Why we need to increase the voltage level
B) Why need to decrease
the voltage level.
29.
In OC test on T/F what happens if input supply is given HV Wdg and
LV in open circuited.
b) In SC test on T/F
what happens if supply is given to LV Wdg and HV winding is short circuited.
30. A) How to identify MI, MC instruments
B) Differentiate MI, MC
instruments.
31. What is LPF wattmeter and UPF watt meter?
32. (a)What OC test on Transformer gives?
(b) What SC test on
transformer gives?
33.(a)
Watt meter reading in OC test Represents ___________
(b) Watt meter reading in SC test
represents____________
34. Define voltage regulation
in transformer
35. When can voltage
regulation of transformer becomes zero?
36. Type of EMF induced in transformer________
37.what are differences between core type T/f and shell T/f
38.What are power transformers and distribution transformers
38.What are power transformers and distribution transformers
Tuesday, 16 April 2013
All The Best
Hai All,
I hope all are preparing well for PEE Second mid.Put your 100% efforts today .this preparation would help you during lab external exam.
I hope all are preparing well for PEE Second mid.Put your 100% efforts today .this preparation would help you during lab external exam.
Sunday, 14 April 2013
PDC BITS
PDC
JNTUH
BITS
SECTION-I: Multiple
choice questions
1. Bootstrap’s sweep circuit
produces _____ type of waveform. [ a]
(a) positive going Ramp
(b) negative going Ramp (c) either a or b (d) Both a and b
2. The gate signal is
also called as ___________. [c ]
(a) enabling pulse (b) control pulse (c) both a and b
(d) either a or b
3. Sampling gates are
used in _______. [d]
(a)Multiplexers (b) D to
A converters (c) Sample and Hold circuits (d) All the above
4. The variations in
phase delay occur due to ____. [c ]
(a) variations in loop
gain (b) variations in supply voltage (c) both a and b (d) None
5. Among the logic
families, low power dissipation is in _____. [ b]
(a)DTL (b) CMOS (c) TTL
(d) ECL
6. Synchronization is
said to be with frequency division, if the generators operate at___ [b ]
(a) same frequency (b)
different frequency (c) both a and b (d) None
7. Synchronization with
symmetrical signals is possible if_______. [c ]
(a) Tp <= T0 (b) Tp >=
T0 (c)
both a and b (d) either a or b
8. Which of the
following logic family has highest fan-out. [ d]
(a) ECL (b) TTL (c) DTL (d) CMOS
9. Among the logic
families, Slowest logic family is_____. [c ]
(a)TTL (b)DTL (c)CMOS (d)ECL
10. In Miller circuit,
the gain A of the inverting amplifier should be ____. [c ]
(a) unity (b) zero (c) infinite (d) None of the above
11. The time during which the waveform returns to the
initial value is called: [b ]
(a) fall
time (b) flyback time (c) rise time (d) delay time
12. The circuit which require an amplifier whose gain
is nearly infinity [ b]
a) Boot strap ckt b)
Miller ckt c) Phantastron ckt d) Inductor ckt
13. When generators with equal frequencies run in synchronism,
the synchronization is said to be on a [ a]
a) one-to-one
basis b) one-to-two basis c) two-to-one basis d) one-to-four basis
14.
A Transmission circuit which allows an input Signal to pass through it during a
selected interval and blocks it passage outside this time interval is called: [
a]
a) sampling gates b) conventional gates c)
non-conventional gates d) logic gates
15. In unidirectional sampling gate the combination
of RC forms a [ b]
a)Differentiator b)
Integrator c) Coupling elements d) Multivibrator
16. The ratio of maximum deviation to the sweep
amplitude is called [ b]
a) Slope error (b)
displacement error (c) Transmission error (d) Linear error
17. A capacitor is charged linearly from a constant
current source is used to generate [c ]
a)sine wave form (b)
pulse wave form (c) time base waveform (d) trapezoidal wave form
18. The several factors which affect phase delay given
rise to [ a]
a)
Phase jitter b)amplitude jitter c)both amplitude and phase jitter d)frequency
jitter
19. The interval of time is selected by means of an
externally applied signal termed as:
[b ]
a) Transient signal b) gating signal c) output signal
d)exponential signal
20. Logic gates are the basic elements that make a [ d]
a) analog system b) gating system c)
basic system d)digital system
21.The relation between the slope
error, displacement error and transmission error is
22. To get a saw-tooth out put waveform, the restoration
time is [ a]
( a ) zero ( b ) rise time ( c ) storage time ( d )
infinity
23. In Miller time base generator, which of the
following is used [b ]
(a) an inverting amplifier with a gain of unity (b)
an inverting amplifier with a gain of infinity (c) non-inverting amplifier with
a gain of unity (d) non-inverting amplifier with a gain of infinity
24. Synchronization with symmetrical signals is possible
for [ d]
( a ) Tp = To only ( b ) Tp<To only ( c ) Tp >To only
( d ) both Tp<To and Tp> To
25. The time during which the output increases linearly is
called [ a]
( a ) sweep time ( b ) flyback time ( c ) return time ( d )
restoration time
26. The interval of time of transmission of a signal in a
sampling gate is selected by means of [ c]
( a ) time delay ( b ) off time of gate ( c ) gating signal
( d ) source signal
27. The following all are disadvantages of unidirectional
gate, except [d ]
( a ) interaction between the signal source and control
voltage source ( b ) limited used of gate ( c ) slow rise of the control
voltage ( d ) little time delay though the gate
28. Which of the following logic gives the complementary
outputs? [ d]
( a ) DTL ( b ) RTL ( c ) TTL ( d ) ECL
29. The voltage at the input of a gate which causes a
change in the state of the ouput from one logic level to the other is [c ]
( a ) cut-in voltage ( b ) cut-off voltage ( c ) threshold
voltage ( d ) peak voltage
30. The high state fan out of a gate is defined at when the
[ c]
( a ) input is at logic ‘0’ ( b ) input is at logic ‘1’
( c ) output is at logic ‘1’ ( d ) output is at logic ‘0’
SECTION-II: Fill in the blanks
1. The ratio of the difference between the input
and the output to the input at the end of the sweep time is called Transmission error
2. The
output of the time base generator is called Sweep Voltage
3. The gain of a sampling gate is defined as The ratio of the output voltage
to the input voltage during transmission
4. Ideal sampling gate is a transmission circuit in which the output
is an exact replica of input waveform during a selected time interval and is
zero otherwise.
5. The periodic
variations in the phase delay are called Phase jitter
6. The range of synchronization increases with
increasing sync signal
amplitude
7. The relation between slope error and
transmission error is es=2et
8. Typical noise margin for DTL family is 700mv
9. CML is also called
as ECL
10. In a 4-diode sampling gate, minimum value of Vc is
given by Vcmin=Vs
[2+Rc / RL]
11.The maximum number of gates that can be driven
by any logic gate is called Fan out
12) If synchronization is achieved with different
frequencies, i.e one frequency being n times the other, then it is termed synchronization with frequency
division
13) Two or more generators are said to be running synchronously if all of them arrive at some point in the
cycle at exactly the same instant of time.
14) Sampling gates
are used in chopper amplifiers
15) In positive logic system, the higher of the two voltage levels
represent logic 1 and lower logic is 0
16) A voltage time base generator is one
that provides an output voltage waveform a portion of which exhibits a linear
portion with time
17) The ratio of the difference in slope at
beginning and end of the sweep to initial value of slope is called slope error or sweep
speed error
18) Sampling gates are classified into two types
19) Chopper often called as modulator
20) A positive logic NOR gate is equivalent to
negative logic NAND gate
21).The time required by the sweep voltage to
return to the initial value is called
restoration time,
return time or flyback time
22. Compensating networks used to improve the linearity of bootstrap circuit
23. The output of a time-base generator is called sweep voltage
24. The range of synchronization decreases with decreasing of sync signal amplitude
25. When generator with equal frequencies run in
synchronism, the synchronization is said to be on a one to one
basis
26. Bidirectional sampling gates transmit signals in both
the polarities
27. The sampling gate is used in sampling scope because the
display consists of samples of input waveform
28. The power required by the gate to operated with 50%
duty cycle at a specified frequency is called power
dissipation
29. High state nose margin of a gate is defined as VOH(min)-VIH(min)
30. The basic TTL gate is NAND gate
Prepared By
G.Swathi& Ravali
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