Monday 11 February 2013

III year Digital communications bits




                                     Digital    communications

                                                Unit-1


 1.The advantage of Manchester encoding is [    c ]
A) less band width requirement B) less bit energy required for transmission
C) less probability of error D) less bit duration

2. The Nyquist's rate of sampling of an analog signal S(t) for alias free reconstruction is 5000samples/sec. For a signal x(t) = [S(t)]2 ,the corresponding sampling rate in samples/sec is  10,000

3. The sampling rate in Delta Modulation is More than PCM.


                                           Uniit-2

1.  The minimum band width required to multiplex 12 different message signals each of band width 10KHz is [   b]
A) 60KHz B) 120KHz C) 180KHz D) 160KHz

2.  Companding results in [   c]
A)More S/N ratio at higher amplitudes of the base band signal
B) More S/N ratio at lower amplitudes of the base band signal
C) Uniform S/N ratio throughout the base band signal
D) Better S/N ratio at lower frequencies

3.  A uniform quantizer is having a step size of .05 volts. This quantizer suffers from a maximum quantization error of [     b ]
A) 0.1V B) 0.025 V C) 0.8 V D) 0.05 V

4.  Granular Noise in Delta Modulation system can be reduced by   [ c  ]
A) using a square law device B) increasing the step size
C) decreasing the step size D) adjusting the rate of rise of the base band signal

5.  Tapped Delay Line Filter  is used as a Predictor in a DPCM transmitter.

6. A signal extending over -4v to +4v is quantized into 8 levels. The maximum possible quantization error obtainable is 0.5v V.

7. The sampling rate in Delta Modulation is more than PCM.


                                                  Unit-3



 1.In 8-PSK system, adjacent phasors differ by an angle given by ( in degrees) [ a   ]
A) n/4 B) n/8 C) n/6 D) n/2

2.  Band Width efficiency of a Digital Modulation Method is    [ c  ]
A) (Minimum Band width)/ (Transmission Bit Rate)
B) (Power required)/( Minimum Band width)
C) (Transmission Bit rate)/ (Minimum Band width)
D) (Power Saved during transmission)/(Minimum Band width)

3.  The minimum band width required for a BPSK signal is equal to [d   ]
A) one fourth of bit rate B) twice the bit rate C) half of the bit rate D) bit rate

4. In Non-Coherent demodulation, the receiver     [      b      ]
A) relies on carrier phase B) relies on the carrier amplitude
C) makes an error with less probability D) uses a carrier recovery circuit

5. Non-coherent detection of FSK signal results in   More Probability of error

6. The phases in a QPSK system can be expressed as  0, 90, 180,270


7. The Synchronization is defined as The use of same clock to maintain the order of transmission



                                                          Unit-4

1.  The Auto-correlation function of White Noise is [  a]
A) Impulse function B) Constant C) Sampling function D) Step function


2. A Matched filter is used to   minimizes the probability of error

3. The bit error Probability of BPSK system is same that of QPSK.



                                                                                                                               Prepared by
                                                                                                                                Jyosthna

III Year MP and MC Bits



                                              
                                  Micro processors and micro controllers

                                    JNTUH mid bits

                                              

                                                           UNIT-1

 1.Which of the following register is not present in EU( Execution Unit) of the 8086 microprocessor? [   d]
a. SP b.BP c.SI d.IP

2.  Which signal is used to demultiplex the Adress bus of 8086 [   d  ]
a. BHE b.LOCK c.READY d.ALE

3.  Which of the following signal is used to control the direction of dataflow of bus transcievers [  a ]
_ __ ____
a.   DT / R b. M / IO c. DEN d.ALE

4.  Which of the following signal belongs to maximum mode only [  c  ]
____ _____ _____ ____
a.   RD b. TEST c. LOCK d. DEN

5.  Which of the following pair of registers is invalid [ a ]
a. CS:SP b. SS: SP c. DS:BX d. ES:DI

6.  Which of the following flags is used for single stepping [   c]
a. Direction Flag b. Interrupt Flag c.Trap Flag d. Overflow Flag

7.  Which of the following are the three basic sections of a microprocessor unit? [   b]
(A) operand, register, and arithmetic/logic unit (ALU)
(B) control and timing, register, and arithmetic/logic unit (ALU)
(C) control and timing, register, and memory
(D) arithmetic/logic unit (ALU), memory, and input/output

8.  Which bus is a bidirectional bus? [  b ]
(A) address bus (B) data bus (C) address bus and data bus (D) none of the above

9.  Direction flag is used with [  a]
(A) String instructions (B) Stack instructions
(C) Arithmetic instructions (D) Branch instructions


10.  What does microprocessor speed depends on? [  c ]
(A) Clock (B) Data bus width (C) Address bus width (D)size of register

11.  A register capable of shifting its binary information either to the right or the left is called a[ c] (A)parallel register (B) serial register (C) shift register (D) storage register


12.  What is meant by Maskable interrupts? [  b ]
(A) An interrupt which can never be turned off
(B) An interrupt that can be turned off by the programmer
(C) An interrupt which can be turned off automatically
(D) none

13.  In a DMA write operation the data is transferred [  a]
(A) from I/O to memory (B) from memory to I/O
(C) from memory to memory (D) from I/O to I/O


                                       Fill in the blanks


1.      Flags are divided into control flags & conditional flags

2.      Data bus is used for  sending and receiving data between CPU and other devices

      3. The function of instruction CLC is to  reset the carry flag to zero

3.      ALE( address latch enable) signal is provided by 8086 to demultiplex the AD0-AD15 into A0-A15 & D0-D15 using external latches.

4.      The part of operating system which is loaded in RAM during powerup from harddisk or floppy disk is known as  DOS(disk operating system)

      6.The cycle required to read from memory is called  Machine Cycle.


      7.The address available at 8086 pins is called  Physical Address


      8. The Condition which makes CPU execute next instruction after WAIT instruction is
 TEST Becomes Low




                                                    UNIT-2


1.  Which of the following register holds the address of I/O port of I/O instructions of 8086 [ b   ]
         a. BX    b.DX     c.SI     d.DI


2.  What do the symbols [ ] indicate?               [ c]
(A) Direct addressing (B) Register Addressing
(C) Indirect addressing (D) None of the above


  Fill in the blanks

3. The instruction MOV AX,BX gives that   the contents of register BX are copied to AX and stored in it


4. The instruction MOV 1234[BX],3456H is   Six (6) bit (opcode) Instruction.




                                                              UNIT-3



1.  The advantage of memory mapped I/O over I/O mapped I/O is, [ d   ]
(A) Faster (B) Many instructions supporting memory mapped I/O
(C) Require a bigger address decoder (D) All the above


2.  Which pins are general purpose I/O pins during mode-2 operation of the 8255? [  a ]
(A) PA0 – PA7 (B) PB0-PB7 (C) PC3-PC7 (D) PC0-PC2

3. An example for a D/A converter is  IC 1408,DAC0830/DAC0831/DAC0832

4._Port A port of 8255 can be programmed in three modes: mode 0, mode 1, mode 2.

5.The modes used in display mode are  left entry mode (type wroter mode) & right entry mode (calculator type mode)



                                                         UNIT-4


 1.If a memory block uses address range 10000H to 2FFFFh then its capacity is [  b    ]
    a. 64KB b.128KB c.256KB d.512KB

2.  Which Command word of 8259 is used masking interrupts [  c  ]
a. ICW1 b.ICW2 c.OCW1 d.OCW2

3. During block transfer mode , the completion of data transfer is indicated by  . TC Flag

4.The  Seventh (7) bit of the Control word register of 8257 is used for enabling auto load facility.

5.The Instruction of 8257 used to disable CPU address is  AEN.

6.The number of 8259s required to service 64 interrupts is Nine (9)

7.. The command word used to differentiate master and slave is ICW3.


                                                                                                        Prepared by
                                                                                    Chayadevi

II year STLD bits with answers






                                                STLD

                                                   FIRST MID JNTUH ONLINE BITS           
     
                                        UNIT-1(Number systems and codes)




Section-I :  choose the correct answer

 1. The fraction (0.68)10 is equal to [        ]
a) (0.010101)2 b) (0.101)2 c) (0.10101)2 d) (0.10111)2

2. The Hexadecimal number A0 has the decimal value [    ]
a)80 b) 256 c) 100 d) 160

3. Given two numbers A & B in sign magnitude representation in an eight bit format A=00011110 & B=10011100,   A XOR B gives [    ]
a)10000010 b) 00011111 c) 10011101 d) 11100001

4. The value of binary 1111 is [ ]
a) 23-1 b) 24-1 c) 24 d) none of these

 5. The minimum number of bits required to represent negative numbers in the range of -1 to -11 using 2’s complement arithmetic is [ ]
(a)2 (b) 3 (c) 4 (d) 5

6. The following code is not a BCD code. [ ]
a)Gray code (b) Xs-3 code (c) 8421 code (d) All of these

7. A 15-bit hamming code requires [ ]
(a)4 parity bits (b) 5 parity bits (c) 15 parity bits (d) 7 parity bits

 8.If=5,the base(radix) of the number system is [ ]
a)5 (b) 6 (c) 7 (d) 8

9. The hexadecimal number system is used in digital computers and digital systems to [ ]
(a) Perform arithmetic operations (b) Perform logic operations
(c) Perform arithmetic and logic operations (d) Input binary data into the sys

10.  Determine the value of base x  if : (211)x = (152)8 [ d]
(a) 2 (b) 10 (c) 8 (d) 7

11.  Determine the value of base x, if (193)x = (623)8 [a ]
(a)16 (b)4 (c)2 (d)5

12.  Which of the following are called Universal gates [ a]
(a) NAND,NOR (b) AND,OR (c) XOR XNOR (d) OR,XOR

Section-II: Fill in the blanks

18. Cyclic codes are also called ________________codes

19. The basic two types of BCD codes are _______________and________ codes.

20. The distance between code words 10010 & 10101 is ________.

21. Convert the binary code (110110)2 to Gray code    101101

22. Conversion of 0.1289062 decimal number to its hexa equivalent is  (0.21)16

23. In b’s complement method, the carry is Ignored and in(b-1)’s complement method the carry 
is add to the LSD


24. The MSB of a binary number has a weight of 512,the number consists of 10 bits bits.

25. Alpha numeric codes are codes which represent letters of the alphabets and decimal numbers as a sequence of 0s and 1s.


           UNIT-2(Boolean algebra and switching functions)


 1.The short hand notation of min term m6 is [     d]
(a) (b) (c) ABC (d)
2.  In Boolean algebra A+AB= A

3. Boolean expression xy+yz+ = xy+z  on reduction.

4. The given expression Y=A+AB+ABC in SOP form is  ABC+A+AB+AC




                        Unit-3(minimization of switching functions)


1. In K-map each of the cell represents one of the _________ possible products [ a  ]
(a)2n (b)2-n (c)n2 (d)All the above



                              Unit-4(combinational logic designs)

1.  The serial adder is a ___________circuit, the parallel adder is a ___________ circuit excluding the registers [d ]
(a)sequential, sequential (b)combinational, sequential
(c)combinational, combinational (d) sequential, combinational

2.  Which of the following are called Universal gates a[a ]
(a) NAND,NOR (b) AND,OR (c) XOR XNOR (d) OR,XOR

3.  Which of the following circuits can be used as parallel-to-serial converter [c ]
(a)digital counter (b)decoder (c)multiplexer (d)demultiplexer



                                                    STLD feb 2012 paper

 1. The minimum number of bits required to represent negative numbers in the range of -1 to -11 using 2’s complement arithmetic is [d ]
(a)2 (b) 3 (c) 4 (d) 5

2. The following code is not a BCD code. [ a]
a)Gray code (b) Xs-3 code (c) 8421 code (d) All of these

3. A 15-bit hamming code requires [ a]
(a)4 parity bits (b) 5 parity bits (c) 15 parity bits (d) 7 parity bits

4. The logic expression (A+B)(+) can be implemented by giving the inputs A and B to a two-input [c ]
(a)NOR gate (b) NAND gate (c) X-OR gate (d) X-NOR gate

5. Which of the following Boolean algebraic expressions is incorrect? [ b]
(a)A+B=A+B (b) A+AB=B (c) (A+B)(A+C)=A+BC (d) (A+)(A+B)=A

6. If=5,the base(radix) of the number system is [b ]
a)5 (b) 6 (c) 7 (d) 8

7. The hexadecimal number system is used in digital computers and digital systems to [d ]
(a) Perform arithmetic operations (b) Perform logic operations
(c) Perform arithmetic and logic operations (d) Input binary data into the system.

8. The logic expression A+B can be implemented by giving inputs A and B to a two-input [ c]
(a)NOR gate (b) NAND gate (c) X-OR gate (d) X-NOR gate

9. A gate is enabled when its enable input is at logic 0. The gate is [a ]
(a)NOR (b) AND (c) NAND (d) None of these

10. The output of a logic gate is 1 , when all its inputs are at logic 0.The gate is either [a ]
(a)a NOR or an X-NOR (b) a NAND or an X-OR
(c) an OR or an X-NOR (d) an AND or an X-OR

11. In b’s complement method, the carry is Ignored and in(b-1)’s complement method the carry is add to the LSD

12. The MSB of a binary number has a weight of 512,the number consists of 10 bits

13.Alpha numeric codes are codes which represent letters of the alphabets and decimal numbers as a sequence of 0s and 1s.

14. The interconnection of gates to perform a variety of logical operations is called Logic design

15. The NOR gate can function as a NOT gate if All inputs connected togethor

16. The implicants which will definitely occur in the final expression are called Essential prime implicants

17. The prime implicant mode of a bunch of 0s is called a False prime implicant

18. Encoding is a process of converting familiar numbers or symbols into a coded format.

19. A decoder with 64 output lines has Six select lines.

20. A decimal – to – BCD encoder is a 10 line to 4 line encoder.

  
                                                                                                         Prepared by
                                                                                                       Sowmya &Srilatha                                                                                                              

Saturday 9 February 2013

ECA 4 units bits with answers


                                             ECA

                                                     JNTUH OBJECTIVE EXAM

                                      UNIT-1: (SINGLE STAGE AMPLIFIERS)

SECTION-I : Choose the correct answers

1.  Which of the following amplifier has high power gain [ b]
(a) CB (b) CE (c) CC (d) both CB and CE

2.  The slope of ac load line is _________ that of dc load line. [b  ]
(a) same as (b)more than (c) less than (d) None of the above

3.  In a RC coupled amplifier, which of the following component is mainly responsible for harmonic distortion of the signal [   a]
(a) Transistor (b) Biasing resistor (c) coupling capacitor (d) power supply

4.  The voltage gain of well designed single stage CB amplifier is essentially determined by ac collector load and [C ]
A. Emitter resistor Re B. ac alpha C. Input resistance emitter diode D.ac beta.


5.  The emitter of a CE amplifier has no AC voltage because of the [c ]
A. DC voltage unit B. Bypass Capacitor C. Coupling capacitor D. load resistance


6.  Typical value of hie is [ ]
A. 1k B. 25k C.50k D.100k

SECTION-II: Fill in the blanks

7. The parameter h22 has units of  SEIMENS

8. A CC Amplifier has highest current gain but lowest power gain

9. The current gain of single stage CE amplifier is nearly equal to Beta


10. The input impedance Ri of a CE amplifier in terms of hie, hoe, hre and load resistance. ___________________.

11. The phase difference between output and input voltages of a CB amplifier is 0


12. According to Miller’s theorem, the feedback capacitance when referred to input side with gain A is _Cin = C(1-A)

13. Trans conductance gm in hybrid - π model is defined as  gm = ΔIc / ΔVBE when VCE=Constant



                                             UNIT-2: (Multi stage amplifiers)

1.  The most desirable feature of transformer coupling is its [c]
A. Higher voltage gain B. wide frequency range C.ability to provide impedance matching D. ability to eliminate hum from the output

2.  For matching a circuit of output impedance 200Ω with a load of 8 Ω the turn ratio of the two winding transformer should be [d ]
A. 25 B.1/25 C.1/5 D.5

3.  In the initial stages of a multi stage amplifier, we use [a ]
(a) RC coupling (b) transformer coupling (c) direct coupling (d) None
4.  The bandwidth of a single stage amplifier is ___ that of a multi stage amplifier. [ a ]
(a) more than (b) less than (c) same as (d) none
5.  The Darlington pair consists of the following two stages [ d ]
(a) CE,CC (b)CE,CB (c)both CE (d) both CC
6. Transformer coupling is generally used when RL is Small

7. In a two stage cascaded amplifier, each of two cascaded stages has a voltage gain of 30 then the overall gain is _900

8. Why do we go for multi stage amplifiers? for high gain
9. Direct coupled amplifiers are especially suited for amplifying extremely LOW frequency signals.

10. The DC resistance of transformer coupling is Low so it is more efficient


                            
                                   UNIT-3 (BJT amplifiers-frequency response)

1.  The gain bandwidth product of a two stage amplifier is [ c   ]
(a) same as that of single stage (b) greater than that of single stage
(c) less than that of single stage (d) product of two gain bandwidth products of each stage


2.  How does the amplifier behave for high frequencies? [   b   ]
(a) high pass filter (b) low pass filter (c) band pass filter (d) None


3.  The bandwidth of an amplifier can be increased by [b   ]
A. decreasing the capacitance of its bypass capacitors B.minimizing the stray capacitance
C.increasing the input signal frequency D. cascading it

4.  Lower cutoff frequency of an amplifier is primarily determined by the [D ]
A.Internal capacitance of the active device
B.Stray capacitance between its wiring and ground
C.ac beta(β) value of its active devices
D.Capacitances of coupling and bypass capacitor

5.  The main reason for the variation of amplifier gain with frequency is [A ]
A. the presence of capacitance internal and external B. due to interstage transformation
C. the logarithmic increase in its output power D. miller effect

6. The alpha (α) cut off frequency of a transistor is higher than is beta (β) cut-off frequency

7. The alpha (α) of the transistor Decreases with the increase in frequency

                                              UNIT-IV (MOS amplifiers)

1.  A source follower using FET usually has a voltage gain of _____. [b ]
(a) -1 (b) >100 (c) about -10 (d) less than 1 but positive

2.  For the operation of enhancement only N- Channel MOSFET , value of gate voltage has to be [  a]
A. High positive B. high negative C. low positive D. zero

3. In depletion mode and N- Channel DE MOSFET conducts with Vgs is ZERO

4. A MOSFET can be easily destroyed by any Stray voltage on its gate.

5. The positive gate operation of a N- Channel Depletion MOSFET is known as  Enhancement mode.

6. Cascade amplifier is combination of CB-CE

7. CD amplifieris called as source follower

8. CS amplifier produces a phase shift of 180˚


                                                                                         Prepared by
                                                                                         Dhanalakshmi and Neelima